Intel® MAX® 10 Analog to Digital Converter User Guide

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ID 683596
Date 5/04/2021
Public
Document Table of Contents

2.1.8. ADC Sequencer

The Modular ADC Core and Modular Dual ADC Core IP cores implement the sequencer. Use the Modular ADC Core or Modular Dual ADC Core parameter editor to define the ADC channel acquisition sequence and generate the HDL code.

The sequencer can support sequences of up to 64 ADC measurement slots. While configuring the Modular ADC Core or Modular Dual ADC Core IP core, you can select which channel, including the TSD channel, to sample in each sequencer slot. During runtime, you cannot change the channel sequence but you can configure the sequencer conversion mode using the Nios® II HAL driver API.

You can specify up to 64 slots and assign the channel for each slot. You can repeat the same channel number several times if required.

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