R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 10/06/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.4.8.2. Endpoint D3Hot Exit

The Power Management Capability register must enable D3Hot PME_Support. In addition, software must set the PME_en bit in the Power Management Control and Status register.

Application logic needs to assert apps_pm_xmt_pme_i signal to initiate the exit from D3.

Did you find the information on this page useful?

Characters remaining:

Feedback Message