R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide
A newer version of this document is available. Customers should click here to go to the newest version.
Visible to Intel only — GUID: qvq1621980184245
Ixiasoft
Visible to Intel only — GUID: qvq1621980184245
Ixiasoft
4.4.1.2.3. Credit Update/Release
Once the initialization is completed, the source will decrement the credit available for transmission whenever it transmits a transaction. The source also increments the credit available count by *crdt_update_cnt whenever the sink asserts the *update signal.