Intel® Stratix® 10 GX Transceiver Signal Integrity Development Kit User Guide

ID 683206
Date 7/24/2019
Public
Document Table of Contents

4.7.4. Character LCD

A 16 character x 2 line LCD display is connected to the Intel® Stratix® 10 GX FPGA device to display board information and IP address. The LCD module used is New Haven - NHD-0216K3Z-NSW-BBW-V3. This LCD module will be mounted to the Intel® Stratix® 10 GX transceiver signal integrity development board using a 1x10 vertical male 0.1" header on the left side of the module and three plastic standoffs. This mounting scheme allows low profile (less than 0.5 inches in height) components to be placed underneath the LCD module, preserving board real-estate.

The table below summarizes the LCD pin assignments. This signal names and directions are relative to the Intel® Stratix® 10 GX FPGA.

Table 13.  LCD Pin Assignments and Schematic Signal Names
Board Reference Schematic Signal Name Description
7 I2C_5V_SCL I2C serial clock
8 I2C_5V_SDA I2C serial data

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