Intel® Stratix® 10 GX Transceiver Signal Integrity Development Kit User Guide

ID 683206
Date 7/24/2019
Public
Document Table of Contents

4.4.1. FPGA Programming over Embedded Intel® FPGA Download Cable II

Embedded Intel® FPGA Download Cable II is the default method for configuring the Intel® Stratix® 10 GX FPGA using the Intel® Quartus® Prime Programmer in the JTAG mode with the supplied USB cable.

The figure below shows the conceptual block diagram for the embedded Intel® FPGA Download Cable II.

Figure 5.  Intel® FPGA Download Cable II Block Diagram

The embedded Intel® FPGA Download Cable II core for USB-based configuration of the Intel® Stratix® 10 GX FPGA device is implemented using a Type-B USB connector, a CY7C68013A USB2 PHY device, and an Intel® Intel® MAX® 10 10M04SCU169 FPGA. This will allow configuration of the Intel® Stratix® 10 GX FPGA device using a USB cable directly connected to a computer running Intel® Quartus® Prime software without requiring the external Intel® FPGA Download Cable II dongle. This design will convert USB data to interface with the Intel® Stratix® 10 GX FPGA's dedicated JTAG port. Four LEDs are provided to indicate Intel® FPGA Download Cable II activity. The embedded Intel® FPGA Download Cable II is automatically disabled when an external Intel® FPGA Download Cable II dongle is connected to the JTAG header.

Did you find the information on this page useful?

Characters remaining:

Feedback Message