Intel® Stratix® 10 GX Transceiver Signal Integrity Development Kit User Guide

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ID 683206
Date 2/21/2023
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Board Setup 4. Board Components 5. System Power 6. Board Test System 7. Board Update Portal A. Additional Information B. Revision History
1. Overview x
1.1. General Board Description 1.2. Recommended Operating Conditions 1.3. Handling the Development Board
2. Getting Started x
2.1. Installing the Quartus Prime software 2.2. Installing the Development Board 2.3. Installing the Intel® FPGA Download Cable Driver
3. Development Board Setup x
3.1. Setting up the Development Board 3.2. Factory Default Switch and Jumper Settings
4. Board Components x
4.1. Board Overview 4.2. Intel® Stratix® 10 GX FPGA 4.3. MAX V CPLD System Controller 4.4. FPGA Configuration 4.5. Status Elements 4.6. Setup Elements 4.7. User Input-Output Components 4.8. Clock Circuits 4.9. Transceiver Channels 4.10. Communication Ports 4.11. Flash Memory
4.4. FPGA Configuration x
4.4.1. FPGA Programming over Embedded Intel® FPGA Download Cable II 4.4.2. FPGA Programming from Flash Memory 4.4.3. FPGA Programming over External Intel® FPGA Download Cable II
4.7. User Input-Output Components x
4.7.1. User-Defined Pushbuttons 4.7.2. User-Defined DIP Switch 4.7.3. User-Defined LEDs 4.7.4. Character LCD
4.8. Clock Circuits x
4.8.1. Transceiver Dedicated Clocks 4.8.2. General-Purpose Clocks 4.8.3. Embedded Intel® FPGA Download Cable II Clock
5. System Power x
5.1. Power Guidelines 5.2. Power Supply 5.3. Power Management 5.4. Power Distribution System 5.5. Thermal Limitations and Protection Guidelines
6. Board Test System x
6.1. Preparing the Board 6.2. Running the Board Test System 6.3. Using the Board Test System
6.3. Using the Board Test System x
6.3.1. The Configure Menu 6.3.2. The System Info Tab 6.3.3. The GPIO Tab 6.3.4. The Flash Tab 6.3.5. The FMCA Tab 6.3.6. The FMCB Tab 6.3.7. The LPBK Tab 6.3.8. The MXP Tab 6.3.9. The SMA Tab 6.3.10. The QSFP and SFP+ Tab 6.3.11. The CFP4 Tab 6.3.12. Power Monitor 6.3.13. Clock Controller
7. Board Update Portal x
7.1. Connecting to the Board Update Portal 7.2. Using the Board Update Portal
A. Additional Information x
A.1. Safety and Regulatory Information A.2. Compliance and Conformity Information
A.1. Safety and Regulatory Information x
A.1.1. Safety Warnings A.1.2. Safety Cautions
B. Revision History x
B.1. User Guide Revision History
1. Overview
2. Getting Started
3. Development Board Setup
4. Board Components
5. System Power
6. Board Test System
7. Board Update Portal
A. Additional Information
B. Revision History

3.2. Factory Default Switch and Jumper Settings

This section shows the factory switch settings for the Intel® Stratix® 10 GX transceiver signal integrity development kit.
Table 3.  Factory Default Switch Settings
Switch Board Label Default Position Function
SW10 MSEL1 2-3 Closed MSEL setting=0
MSEL2 5-6 Closed MSEL setting=0
SW11 MSEL0 2-3 Closed MSEL setting=0
SW3-1 Intel® Stratix® 10 OPEN/OFF Enable Intel® Stratix® 10 in JTAG Chain
SW3-2 MAX V OPEN/OFF Enable MAX® V in JTAG chain
SW3-3 FMC A CLOSE/ON Bypass FMC A in JTAG chain
SW3-4 FMC B CLOSE/ON Bypass FMC B in JTAG chain
S15-1 OFF = OSC OPEN/OFF Select Si570 clock source for U3
S15-2 ON = SMA OPEN/OFF Select Si570 clock source for U4
SW1-1 S0 OPEN/OFF Frequency Select
SW1-2 S1 CLOSE/ON Frequency Select
SW1-3 SS0 OPEN/OFF Spread Spectrum Select
SW1-4 SS1 OPEN/OFF Spread Spectrum Select
SW2-1 OFF=ISOLATE CLOSE/ON U15 (LTC2987) is enabled in I2C topology
SW2-2 ON=FULL CHAIN CLOSE/ON U15 (LTC2987) is enabled in I2C topology
S1-1 OFF=ISOLATE CLOSE/ON U5 and U6 (Si5341) is enabled in I2C topology
S1-2 ON=FULL CHAIN CLOSE/ON U5 and U6 (Si5341) is enabled in I2C topology
S14-1 VCCT OPEN/OFF Enable on-board VCCT regulator
S14-2 VCCH OPEN/OFF Enable on-board VCCH regulator
SW9-1 VCCRR OPEN/OFF Enable on-board VCCRR regulator
SW9-2 VCCRL OPEN/OFF Enable on-board VCCRL regulator
SW9-3 VCCERAM OPEN/OFF Enable on-board VCCERAM regulator
SW9-4 VCC OPEN/OFF Enable on-board VCC regulator
SW8-1 MAX10_DIPSWITCH OPEN/OFF Power Intel® MAX® 10 user DIP Switch
SW8-2 FAN_ON OPEN/OFF FAN is not full speed
SW8-3 PWR_MGMT_SEL OPEN/OFF Select Linear Tech PWR MGMT solution
SW8-4 MAX10_BOOTSEL OPEN/OFF Power Intel® MAX® 10 boot select
SW6-1 FACTORY_LOAD OPEN/OFF Factory Load Control
SW6-2 MAX5_SWITCH2 OPEN/OFF MAX V user DIPSwitch
SW6-3 MAX5_SWITCH0 OPEN/OFF MAX V user DIPSwitch
SW6-4 MAX5_SWITCH1 OPEN/OFF MAX V user DIPSwitch
SW4-1 S10_UNLOCK OPEN/OFF Stratix 10 User DIPSwitch
SW4-2 USER_DIP6 OPEN/OFF Stratix 10 User DIPSwitch
SW4-3 USER_DIP5 OPEN/OFF Stratix 10 User DIPSwitch
SW4-4 USER_DIP4 OPEN/OFF Stratix 10 User DIPSwitch
SW5-1 USER_DIP3 OPEN/OFF Stratix 10 User DIPSwitch
SW5-2 USER_DIP2 OPEN/OFF Stratix 10 User DIPSwitch
SW5-3 USER_DIP1 OPEN/OFF Stratix 10 User DIPSwitch
SW5-4 USER_DIP0 OPEN/OFF Stratix 10 User DIPSwitch
SW7 SW7 OFF On-board power switch
Level Two Title