External Memory Interfaces Arria® 10 FPGA IP User Guide

ID 683106
Date 4/01/2024
Document Table of Contents clks_sharing_slave_in for QDR II/II+/II+ Xtreme

Core clocks sharing slave input interface

Table 120.  Interface: clks_sharing_slave_inInterface type: Conduit
Port Name Direction Description
clks_sharing_slave_in Input This port should be connected to the core clocks sharing master.