A.3.7. Uncorrectable Internal Error Status Register (Offset 0x34)
This register reports the status of the internally checked errors that are uncorrectable. When these specific errors are enabled by the Uncorrectable Internal Error Mask register, they are forwarded as Uncorrectable Internal Errors.
|Bits||Register Description||Default Value||Access|
|||Debug Bus Interface (DBI) access error status from Config RAM block.||0x0||RW1CS|
|||Uncorrectable ECC error from Config RAM block.||0x0||RW1C|
|||RX Transaction Layer parity error reported by the IP core.||0x0||RW1CS|
|||TX Transaction Layer parity error reported by the IP core.||0x0||RW1CS|
Uncorrectable Internal Error reported by the FPGA.
|||cvp_config_error_latched: Configuration error detected in CvP mode is reported as an uncorrectable error. Set whenever ssm_cvp_config_error of the SSM Scratch CvP Status register bit rises in CvP mode. This bit is only available for Port 0 ( PCIe* Gen4 x16), but not for the other Ports.||0x0||RW1CS|
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