P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683059
Date 6/20/2022
Public

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A.2.2.2.2. TPH Requester Capability Register (Offset 0x4)

This is a read-only register that specifies the capabilities associated with the implementation of TPH in the device.

Note: Steering Tag (ST) table must be implemented in the user logic if present. The capability will not hold the ST table.
Table 131.  TPH Requester Capability Register
Bits Register Description Default Value Access
[0 ]

No ST Mode Supported: When set to 1, indicates that this Function supports the No ST Mode for the generation of TPH Steering Tags. In the No ST Mode, the device must use a Steering Tag value of 0 for all requests.

This bit is hardwired to 1, as all TPH Requesters are required to support the No ST Mode of operation.

0x1 RO
[1]

Interrupt Vector Mode Supported: A setting of 1 indicates that the Function supports the Interrupt Vector Mode for TPH Steering Tag generation. In the Interrupt Vector Mode, Steering Tags are attached to MSI/MSI-X interrupt requests. The Steering Tag for each interrupt request is selected by the MSI/MSI-X interrupt vector number.

Programmed via Programming Interface.

RO
[2]

Device Specific Mode Supported: A setting of 1 indicates that the Function supports the Device Specific Mode for TPH Steering Tag generation. The client typically choses the Steering Tag values from the ST Table, but is not required to do so.

Programmed via Programming Interface.

RO
[7:3] Reserved 0x0 RO
[8] Extended TPH Requester Supported: When set to 1, indicates that the Function is capable of generating requests with 16-bit Steering Tags, using TLP Prefix.

Programmed via Programming Interface.

RO
[10:9] ST Table Location: The setting of this field indicates if a Steering Tag table is implemented for this Function, and its location if present.
  • 2'b00 = ST Table not present
  • 2'b01 = ST Table stored in the TPH Requester Capability Structure
  • 2'b10 = ST values stored in the MSI-X Table in client RAM
  • 2'b11 = reserved
Valid settings are 2'b00 or 2'b10.

Programmed via Programming Interface.

RO
[15:11] Reserved 0x0 RO
[26:16] ST Table Size: Specifies the number of entries in the Steering Tag table (0 = 1 entry, 1 = 2 entries, and so on). The maximum table size is 2048 entries when located in the MSI-X table. Each entry is 8 bits.

Programmed via Programming Interface.

RO
[31:27] Reserved 0x0 RO

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