PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex™ 5 FPGAs and SoCs

ID 821801
Date 8/29/2025
Public
Document Table of Contents

1. Overview

This document provides guidelines for creating superior PCB designs for Agilex™ 5 FPGAs and SoCs. The document covers PCB layouts, High Speed Serial Interface (HSSI), External Memory Interface (EMIF), Mobile Industry Processor Interface (MIPI), True Differential I/O Interfaces, and Power Distribution Network (PDN).

The guidelines include recommended footprint and land patterns, and HSSI, EMIF, MIPI, and True Differential I/O routing guidelines for the following Agilex™ 5 FPGAs and SoCs packages:
  • B18A—474-pins VPBGA package
  • B23A—839-pins VPBGA package
  • B23B—795-pins VPBGA package
  • B32A—1591-pins VPBGA package
  • B32B—1610-pins VPBGA package
  • M16A—896-pins MBGA package
Note: Information about B15A and B23D packages are under development and not yet available.

For more information about Agilex™ 5 FPGAs and SoCs device packages, refer to the respective Manufacturing Advantage Services (MAS) Guidelines.