PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex™ 5 FPGAs and SoCs
4.5.1. HSSI Pin-Field Breakout for VPBGA
An optimized high-speed serial interface I/O (HSSI) pin-field breakout routing is crucial to reduce the impact of impedance discontinuity. As demonstrated in VPBGA PCB Layout Guideline section, the high-speed transceivers ball pitch of 0.77/0.75 mm is optimized for high-speed signals, dog-bone fan-out structure is recommended, and both single ended or differential traces can be implemented depending on the routing strategy and fabrication requirement.
Typical 8 mil through-hole via dimensions including drill hole size, maximum stub length, and so forth are listed in the following table.
Note that some of the following simulation results are based on eight mil drill hole size vias with 16 mil pad size for thin board and better signal integrity (SI). Simulation results of 18 mil pad size in BGA area are also presented for comparison. If the simulation results are good, you can also use larger pad size such as 18 mil for high-speed signals vias.
Structure | Dimension (mil) |
---|---|
Drill hole size | 8 |
Finished hole size | 6 |
Pad size | 18 |
Anti-pad size | 24 |
Backdrill anti-pad size | 26 |
Maximum stub length after backdrilling | 10 |