PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex™ 5 FPGAs and SoCs

ID 821801
Date 8/29/2025
Public
Document Table of Contents

4.7.1. GTS Transceiver Channel Recommendations

  • Maximum 1.2 inches of PCB route length on SoM and 2.2 inches on the carrier board. Evaluate the maximum routing length based on specific PCB stack-up and standards.
  • Follow the pair-to-pair spacing rules:
    • 5×H 3 for transmitter-to-transmitter and receiver-to-receiver stripline routing
    • 9×H3 for transmitter-to-receiver stripline routing
    • 6×H or larger spacing for microstrip routing and for receiver-to-receiver on SoM board
  • Keep the insertion loss within the requirement of IEEE specification.
  • Make the N/P routing as symmetrical as possible.
  • Ensure that the ground plane fully surrounds the HSSI traces.

Informative

  • Target Differential Impedance: 90 Ω on SoM and carrier board (95 Ω or 100 Ω is also possible depends on PCB stack-up design).
  • Differential return loss lower than -15 dB from 0 to Nyquist frequency (depends on specific data rate).
3 'H' is the distance from the signal layer to the closest reference layer