PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex™ 5 FPGAs and SoCs
4.7.2. General Guidelines for GTS Transceiver Ethernet Interface
- Intra pair skew: ±1 mil
BGA Breakout Optimization
Through hole vias with backdrill are used. As outlined in the General Design Considerations section, note the change of impedance control tolerance, total insertion loss and so forth for microstrip routing. Altera recommends to use a 3D simulation for optimization the BGA breakout. Try to make return loss lower than -15 dB at Nyquist frequency (lower than -20 dB is better) and control the impedance changing of cut-out area as small as possible (better within ±5 Ω).
Simulation results for 18 mil pad size have been also presented. Both pad sizes can get good performance.
The following figure, the left diagram shows simulation results for 18 mil pad with the same cut-out size as 16 mil pad. The impedance is lower due to large capacitance caused by larger pad size, and the return loss is approximately 3 to 4 dB higher, however still meeting -15 dB requirement. A larger anti-pad size, such as 28 mil improves return loss performance as shown in the right diagram.
The following figure shows Layer 5 breakout structure, where there is no Layer 5 breakout on SoM. This is for simulation study reference.