2.1. Input Register Bank for Fixed-Point and Floating-Point Arithmetic
|Fixed-Point Arithmetic||Floating-Point Arithmetic|
All the registers in the DSP blocks are positive-edge triggered. These registers are not reset after power up and may hold unwanted data. Assert the CLR signal to clear the registers before starting an operation. Each multiplier operand can feed an input register or a multiplier directly, bypassing the input registers.
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