Intel® Stratix® 10 Variable Precision DSP Blocks User Guide

ID 683832
Date 8/13/2021
Public
Document Table of Contents

7.3.1. General Tab

Table 36.   General Tab
Parameter Value Default Value Description
What is the number of multipliers?

1 - 4

1 Number of multipliers to be added together. Values are 1 up to 4.
How wide should the A input buses be? 1 - 256 16 Specify the width of the dataa[] port.
How wide should the B input buses be? 1 - 256 16 Specify the width of the datab[] port.
How wide should the 'result' output bus be? 1 - 256 32 Specify the width of the result[] port.
Create an associated clock enable for each clock

On

Off

Off Select this option to create clock enable for each clock.

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