Intel® Arria® 10 Device Datasheet

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ID 683771
Date 2/14/2022
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POR Specifications

Power-on reset (POR) delay is defined as the delay between the time when all the power supplies monitored by the POR circuitry reach the minimum recommended operating voltage to the time when the nSTATUS is released high and your device is ready to begin configuration.

Table 76.  Fast and Standard POR Delay Specification for Intel® Arria® 10 Devices
POR Delay Minimum Maximum Unit
Fast 4 12 115 ms
Standard 100 300 ms
115 The maximum pulse width of the fast POR delay is 12 ms, providing enough time for the PCIe* hard IP to initialize after the POR trip.

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