Intel® Arria® 10 Device Datasheet

ID 683771
Date 2/14/2022
Document Table of Contents

Absolute Maximum Ratings

This section defines the maximum operating conditions for Intel® Arria® 10 devices. The values are based on experiments conducted with the devices and theoretical modeling of breakdown and damage mechanisms. The functional operation of the device is not implied for these conditions.

Conditions outside the range listed in the following table may cause permanent damage to the device. Additionally, device operation at the absolute maximum ratings for extended periods of time may have adverse effects on the device.
Table 1.  Absolute Maximum Ratings for Intel® Arria® 10 Devices
Symbol Description Condition Minimum Maximum Unit
VCC Core voltage power supply –0.50 1.21 V
VCCP Periphery circuitry and transceiver fabric interface power supply –0.50 1.21 V
VCCERAM Embedded memory power supply –0.50 1.36 V
VCCPT Power supply for programmable power technology and I/O pre-driver –0.50 2.46 V
VCCBAT Battery back-up power supply for design security volatile key register –0.50 2.46 V
VCCPGM Configuration pins power supply 1 –0.50 2.46 V
VCCIO I/O buffers power supply 3 V I/O –0.50 4.10 V
LVDS I/O –0.50 2.46 V
VCCA_PLL Phase-locked loop (PLL) analog power supply –0.50 2.46 V
VCCT_GXB Transmitter power supply –0.50 1.34 V
VCCR_GXB Receiver power supply –0.50 1.34 V
VCCH_GXB Transceiver output buffer power supply –0.50 2.46 V
VCCL_HPS HPS core voltage and periphery circuitry power supply –0.50 1.27 V
VCCIO_HPS HPS I/O buffers power supply 3 V I/O –0.50 4.10 V
LVDS I/O –0.50 2.46 V
VCCIOREF_HPS HPS I/O pre-driver power supply –0.50 2.46 V
VCCPLL_HPS HPS PLL power supply –0.50 2.46 V
IOUT DC output current per pin –25 2 3 4 5 6 25 mA
TJ Operating junction temperature –55 125 °C
TSTG Storage temperature (no bias) –65 150 °C
1 The LVDS I/O values are applicable to all dedicated and dual-function configuration I/Os.
2 The maximum current allowed through any LVDS I/O bank pin when the device is not turned on or during power-up/power-down conditions is 10 mA.
3 Total current per LVDS I/O bank must not exceed 100 mA.
4 Voltage level must not exceed 1.89 V.
5 Applies to all I/O standards and settings supported by LVDS I/O banks, including single-ended and differential I/Os.
6 Applies only to LVDS I/O banks. 3 V I/O banks are not covered under this specification and must be implemented as per the power sequencing requirement. For more details, refer to AN 692: Power Sequencing Considerations for Intel® Cyclone® 10 GX, Intel® Arria® 10, and Intel® Stratix® 10 Devices and Power Management in Intel® Arria® 10 Devices chapter.

Did you find the information on this page useful?

Characters remaining:

Feedback Message