Intel® Arria® 10 Device Datasheet

Download
ID 683771
Date 2/14/2022
Public
Document Table of Contents

HPS Reset Input Requirements

Table 57.  HPS Reset Input Requirements for Intel® Arria® 10 Devices
Description Min Max Unit
HPS cold reset pulse width 600 ns
HPS warm reset pulse width 600 ns
Cold reset deassertion to BSEL sampling, using osc1_clk 86 1000 osc1_clk cycles
Cold reset deassertion to BSEL sampling, using secure clock, without RAM clearing 100 μs
Cold reset deassertion to BSEL sampling, using secure clock, with RAM clearing 50 ms
86 osc1_clk is supplied from the HPS_CLK1 pin.

Did you find the information on this page useful?

Characters remaining:

Feedback Message