Intel® MAX® 10 High-Speed LVDS I/O User Guide

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ID 683760
Date 11/01/2021
Public
Document Table of Contents

1. Intel® MAX® 10 High-Speed LVDS I/O Overview

Updated for:
Intel® Quartus® Prime Design Suite 21.1
The Intel® MAX® 10 device family supports high-speed LVDS protocols through the LVDS I/O banks and the Soft LVDS Intel® FPGA IP.

The LVDS I/O banks in Intel® MAX® 10 devices feature true and emulated LVDS buffers:

  • True LVDS buffers support LVDS using true differential buffers.
  • Emulated LVDS buffers use a pair of single-ended pins to emulate differential buffers.
Table 1.  Summary of LVDS I/O Buffers Support in Intel® MAX® 10 I/O Banks
I/O Buffer Type I/O Bank Support
True LVDS input buffer All I/O banks
True LVDS output buffer Only bottom I/O banks
Emulated LVDS output buffer All I/O banks

The Intel® MAX® 10 D (dual supply) and S (single supply) device variants support different LVDS I/O standards. For a list of LVDS I/O standards supported by the Intel® MAX® 10 D and S variants, refer to the related information.

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