Intel® MAX® 10 High-Speed LVDS I/O User Guide

ID 683760
Date 11/01/2021
Public
Document Table of Contents

4.3.3. Guidelines: Floating LVDS Input Pins

You can implement floating LVDS input pins in Intel® MAX® 10 devices.

For floating LVDS input pins, apply a 100 Ω differential resistance across the P and N legs of the LVDS receiver. You can use external termination.

If you use floating LVDS input pins, Intel recommends that you use external biasing schemes to reduce noise injection and current consumption.

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