3.4.2. High-Speed I/O Timing Budget4.3.2. High-Speed I/O Timing Budget
Intel® MAX® 10 devices implement the SERDES in LEs. You must set proper timing constraints to indicate whether the SERDES captures the data as expected or otherwise. You can set the timing constraints using the Timing Analyzer tool in the Intel® Quartus® Prime software or manually in the Synopsys* Design Constraints (.sdc) file.
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