Intel® MAX® 10 High-Speed LVDS I/O User Guide

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ID 683760
Date 11/01/2021
Public
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3.4.4. Guidelines: LVDS Channels PLL Placement4.3.5. Guidelines: LVDS Channels PLL Placement

Each PLL in the Intel® MAX® 10 device can drive only the LVDS channels in I/O banks on the same edge as the PLL.
Table 10.  Examples of Usable PLL to Drive I/O Banks in Intel® MAX® 10 Devices
I/O Bank Edge Input refclk GCLK mux Usable PLL
Left Left Left Top left or bottom left
Bottom Bottom Bottom Bottom left or bottom right
Right Right Right Top right or bottom right
Top Top Top Top left or top right

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