Agilex™ 7 Hard Processor System Technical Reference Manual

ID 683567
Date 8/13/2024
Public
Document Table of Contents

19.4.9. Clocks and Resets

The SPI controller uses the clock and reset signals shown in the following table.

Table 205.  SPI Controller Clocks and Resets
 

Master

Slave

SPI clock

l4_main_clk l4_main_clk

SPI bit-rate clock

sclk_out sclk_in

Reset

spim_rst_n spis_rst_n