AN 307: Intel® FPGA Design Flow for AMD* Xilinx* Users

ID 683562
Date 9/08/2023

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Document Table of Contents Optimization Modes

By default, Intel® Quartus® Prime Pro Edition uses a balanced optimization strategy that respects timing constraints. It can use other high-level strategies to optimize for performance, area, routability, power, or compile time. These settings affect synthesis and fitter.