DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 12/04/2023

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Document Table of Contents Bit-Accurate Simulation

For most floating-point designs, and any fixed-point designs that use the ConstMult block, the default standard Simulink simulation only approximates the behavior of the generated hardware. Therefore, DSP Builder provides a bit-accurate simulation mode, which exactly matches the behavior of the generated hardware..

You can change the global simulation mode via the Control block on the Simulation tab. Refer to the Simulation Mode parameter in the Control block.

You can also change or override the simulation settings locally within a subsystem via the SynthesisInfo block. Refer to the Simulation Mode parameter in the SynthesisInfo block.

DSP Builder offers the following simulation modes that are in increasing order of accuracy: Standard, Bit Accurate, Bit and Cycle Accurate.

Using a higher accuracy simulation mode often ensures that Simulink and RTL simulations match. However, do not use Bit Accurate or Bit and Cycle Accurate simulation with Memory-Mapped library blocks. You should separate bus blocks and those that do nontrivial maths into different subsystems, which allows you to independently set the simulation modes.