DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 12/04/2023
Public
Document Table of Contents

14.4.6. AddSubFused

The AddSubFused block produces both the sum and the difference of the IEEE floating-point signals that arrive on the input ports.
Table 165.  Port Interface for the AddSubFused Block
Signal Direction Type Description Vector Complex
  Input Single or double Operand 1 Yes Yes
b Input Single or double Operand 2 Yes Yes
+ Output Single or double Result 1 Yes Yes
Output Single or double Result 2 Yes Yes