DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 12/04/2023
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Document Table of Contents
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6.5. DSP Builder Finite State Machine Design Example

The Finite State Machine example design demonstrates some of the features of the finite state machine (FSM) specification and its function in a primitive subsystem. The model file is demo_fsm.mdl. It comprises several example primitive subsystems that use the Finite State Machine block for different use cases.