Arria® V Device Datasheet

ID 683022
Date 5/23/2023
Document Table of Contents Arm* Trace Timing Characteristics

Table 61.   Arm* Trace Timing Requirements for Arria® V DevicesMost debugging tools have a mechanism to adjust the capture point of trace data.
Description Min Max Unit
CLK clock period 12.5 ns
CLK maximum duty cycle 45 55 %
CLK to D0 –D7 output data delay –1 1 ns

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