Arria® V Device Datasheet

ID 683022
Date 5/23/2023
Public
Document Table of Contents

1.1.1.5.4. Differential SSTL I/O Standards

Table 17.  Differential SSTL I/O Standards for Arria® V Devices
I/O Standard VCCIO (V) VSWING(DC) (V) VX(AC) (V) VSWING(AC) (V)
Min Typ Max Min Max Min Typ Max Min Max
SSTL-2 Class I, II 2.375 2.5 2.625 0.3 VCCIO + 0.6 VCCIO/2 – 0.2 VCCIO/2 + 0.2 0.62 VCCIO + 0.6
SSTL-18 Class I, II 1.71 1.8 1.89 0.25 VCCIO + 0.6 VCCIO/2 – 0.175 VCCIO/2 + 0.175 0.5 VCCIO + 0.6
SSTL-15 Class I, II 1.425 1.5 1.575 0.2 15 VCCIO/2 – 0.15 VCCIO/2 + 0.15 2(VIH(AC) – VREF) 2(VIL(AC) – VREF)
SSTL-135 1.283 1.35 1.45 0.18 15 VCCIO/2 – 0.15 VCCIO/2 VCCIO/2 + 0.15 2(VIH(AC) – VREF) 2(VIL(AC) – VREF)
SSTL-125 1.19 1.25 1.31 0.18 15 VCCIO/2 – 0.15 VCCIO/2 VCCIO/2 + 0.15 2(VIH(AC) – VREF) 2(VIL(AC) – VREF)
15 The maximum value for VSWING(DC) is not defined. However, each single-ended signal needs to be within the respective single-ended limits (VIH(DC) and VIL(DC)).