Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 4/20/2022
Public

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6.2.3.1. PCIe0 PF0 IDs

Table 70.  PCIe0 PF0 IDs Settings
Parameter Range Default Value Description

Vendor ID

16 bits

0x00001172

Sets the read-only value of the Vendor ID register. This parameter cannot be set to 0xFFFF per the PCI Express Base Specification.

Address offset: 0x000.

Note: Set your own Vendor ID by changing this parameter.

Device ID

16 bits

0x00000000

Sets the read-only value of the Device ID register. This register is only valid in the Type 0 (Endpoint) Configuration Space.

Address offset: 0x000.

Note: Set your own Device ID by changing this parameter.

Revision ID

8 bits

0x00000001

Sets the read-only value of the Revision ID register.

Address offset: 0x008.

Note: Set your own Revision ID by changing this parameter.

Class Code

24 bits

0x00ff0000

Sets the read-only value of the Class Code register.

This parameter cannot be set to 0x0 per the PCI Express Base Specification.

Address offset: 0x008.

Note: Set your own Class Code by changing this parameter.

Subsystem Vendor ID

16 bits

0x00000000

Sets the read-only value of Subsystem Vendor ID register in the PCI Type 0 Configuration Space. This parameter cannot be set to 0xFFFF per the PCI Express Base Specification. This value is assigned by PCI-SIG to the device manufacturer. This value is only used in Root Port variants.

Address offset: 0x02C

Note: Set your own Subsystem Vendor ID by changing this parameter.

Subsystem Device ID

16 bits

0x00000000

Sets the read-only value of the Subsystem Device ID register in the PCI Type 0 Configuration Space.

This value is only used in Root Port variants.

Address offset: 0x02C

Note: Set your own Subsystem Device ID by changing this parameter.

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