Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 4/20/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.4. Resource Utilization

Table 5.  Intel Stratix 10 H-Tile and P-Tile PCIe x16 [Avalon-MM Interface]
User Mode Link Conf DMA Channels ALMs Logic Registers M20Ks
H-Tile P-Tile H-Tile P-Tile H-Tile P-Tile
MCDMA

PCIe Gen3 x16 for H-Tile

PCIe Gen4 x16 for P-Tile

256 44,034 37,502 109,399 99,491 532 512
BAM_MCDMA

PCIe Gen4 x16 for P-Tile

PCIe Gen3 x16 for H-Tile

256 48,447 41,835 120,555 110,600 616 596
BAM

PCIe Gen4 x16 for P-Tile

PCIe Gen3 x16 for H-Tile

n/a 25,162 17,567 53,976 42,111 307 285
BAS

PCIe Gen4 x16 for P-Tile

PCIe Gen3 x16 for H-Tile

n/a 26,818 20,126 61,369 49,486 257 236
BAM+BAS

PCIe Gen4 x16 for P-Tile

PCIe Gen3 x16 for H-Tile

n/a 33,655 25,104 78,809 65,025 372 346
Table 6.  Intel Stratix 10 H-Tile and P-Tile PCIe x8 [Avalon-MM Interface]
User Mode Link Conf DMA Channels ALMs Logic Registers M20Ks
H-Tile P-Tile H-Tile P-Tile H-Tile P-Tile
MCDMA

PCIe Gen3 x8 for H-Tile

PCIe Gen4 x8 for P-Tile

256 22,914 25,822 61,888 69,774 397 372
BAM_MCDMA

PCIe Gen3 x8 for H-Tile

PCIe Gen4 x8 for P-Tile

256 25,329 28,320 68,691 76,285 452 431
BAM

PCIe Gen3 x8 for H-Tile

PCIe Gen4 x8 for P-Tile

n/a 8,257 9,938 21,171 27,441 199 177
BAS

PCIe Gen3 x8 for H-Tile

PCIe Gen4 x8 for P-Tile

n/a 9,227 11,374 24,973 31,260 169 149
BAM+BAS

PCIe Gen3 x8 for H-Tile

PCIe Gen4 x8 for P-Tile

n/a 12,530 14,563 34,508 40,592 248 226
Table 7.  Intel Stratix 10 H-Tile and P-Tile PCIe x16 [1 port Avalon-ST]
User Mode Link Conf DMA Channels ALMs Logic Registers M20Ks
H-Tile P-Tile H-Tile P-Tile H-Tile P-Tile
MCDMA

PCIe Gen3 x16 for H-Tile

PCIe Gen4 x16 for P-Tile

1 / 32 /64 47866/ 50,093/ 52,951 38,634/ 41,181/ 43,852 117470/ 122,854/ 128,771 104793/ 110,305/ 115,833 560/ 578/ 601 536/ 555/ 576
BAM_MCDMA

PCIe Gen3 x16 for H-Tile

PCIe Gen4 x16 for P-Tile

2 / 32 /64 51976/ 54,300/ 57,132 42,155 / 43,745/ 45,118 128208/ 133,935/ 139,874 113,660 / 117,292/ 120,406 643/ 662/ 684 615 / 625/ 638
Table 8.  Intel Agilex P-Tile and F-Tile PCIe x16 [Avalon-MM Interface]
User Mode Link Conf DMA Channels ALMs Logic Registers M20Ks
P-Tile F-Tile P-Tile F-Tile P-Tile F-Tile
MCDMA Gen4 x16 256 33,805 37,445 97,557 103,143 512 521
BAM_MCDMA Gen4 x16 256 38,546 42,198 108,328 113,886 595 605
BAM Gen4 x16 n/a 17,246 20,780 42,097 47,680 285 295
BAS Gen4 x16 n/a 19,164 22,677 49,327 54,854 236 246
BAM+BAS Gen4 x16 n/a 24,955 28,562 64,885 70,342 346 356
Table 9.  Intel Agilex P-Tile and F-Tile PCIe x8 [Avalon-MM Interface]
User Mode Link Conf DMA Channels ALMs Logic Registers M20Ks
P-Tile F-Tile P-Tile F-Tile P-Tile F-Tile
MCDMA Gen4 x8 256 22,254 23,864 67,551 69,063 372 383
BAM_MCDMA Gen4 x8 256 24,440 26,085 74,195 75,716 431 441
BAM Gen4 x8 n/a 9,052 10,689 27,189 28,675 177 187
BAS Gen4 x8 n/a 10,331 11,907 31,029 32,514 149 159
BAM+BAS Gen4 x8 n/a 13,319 14,933 40,518 41,988 226 236
Table 10.  Intel Agilex P-Tile and F-Tile PCIe x16 [1 port Avalon-ST]
User Mode Link Conf DMA Channels ALMs Logic Registers M20Ks
P-Tile F-Tile P-Tile F-Tile P-Tile F-Tile
MCDMA Gen4 x16 1 / 32 /64 33,913/ 36,373/ 39,480 37,567 / 40,071 / 43,078 102712/ 108,215/ 114,039 108,303 / 113,764 / 119,553 537/ 554/ 576 546 / 564 / 587
BAM_MCDMA Gen4 x16 2 / 32 /64 38,247 / 39,448/ 41,041 41,880 / 43,115 / 44,686 112,445 / 115,445 / 118,806 118,007 / 120,995 / 124,434 620 / 625 / 639 629 / 636 / 648
Table 11.  Intel Agilex P-Tile and F-Tile PCIe x8 [1 port Avalon-ST]
User Mode Link Conf DMA Channels ALMs Logic Registers M20Ks
P-Tile F-Tile P-Tile F-Tile P-Tile F-Tile
MCDMA Gen4 x8 1 / 32 /64 22,978 / 25,343/ 28,399 24,705 / 27,066 / 30,219 72,007/ 77,499/ 83,182 73,565 / 79,005 / 84,731 397 / 413 / 436 407 / 424 / 446
BAM_MCDMA Gen4 x8 2 / 32 /64 24,790 / 26,083/ 27,550 26,541 / 27,776 / 29,334 77,532 / 80,585 / 84,057 79,104 / 82,126 / 85,545 455 / 461 / 473 465 / 470 / 483
Table 12.  Intel Agilex P-Tile and F-Tile Data Mover Only User Mode
User Mode Link Conf DMA Channels ALMs Logic Registers M20Ks
P-Tile F-Tile P-Tile F-Tile P-Tile F-Tile
Data Mover Only Gen4 x16 n/a 31,528 41,514 83,773 91,219 522 532

Data Mover Only

Gen4 x8 n/a 18,163 25,718 56,890 60,391 381 391
Table 13.  Intel Stratix 10 P-Tile Data Mover Only User Mode
User Mode Link Configuration DMA Channels ALMs Logic Registers M20Ks
Data Mover Only Gen4 x16 n/a 33,214 84,200 522

Data Mover Only

Gen4 x8 n/a 21,149 57,077 381