Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 4/20/2022

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Document Table of Contents Channel Management

  • Each character device associated with a physical function.
  • Channel allocation is done from a list of free channels.
  • Driver context of each channel is saved in the private area of the file descriptor. This helps with the quick retrieval of the context of the acquired channel for further operations. An alternative to this is creation of one character device per channel but that results in huge number of char dev files when MCDMA scales up.
  • Descriptor Memory Management:
    • The descriptor memory forms the queue for submission of descriptors
    • dma_alloc_coherent API of Linux DMA framework is used for the allocation of non-swappable physically contagious memory for the queue
    • Each queue (H2D & D2H) of each channel gets its descriptor memory
    • After allocation of this memory, the Hardware is notified of it by a write of the starting address to the QCSR region