AN 307: Intel® FPGA Design Flow for Xilinx* Users

ID 683562
Date 2/25/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4. Xilinx* to Intel® FPGA Design Conversion

To successfully convert a Xilinx* -targeted design for use in an Intel® FPGA device, you must consider the following aspects:
  1. Replacing Xilinx* primitives with Intel® FPGA primitives, IP cores, or constraints.
  2. Replacing Vivado* IP Catalog modules with IP cores generated with the Intel® FPGA IP Catalog.
  3. Expressing timing, device, and placement constraints found in the Xilinx* design with their counterpart in the Intel® Quartus® Prime software.
  4. If applicable, setting up the simulation environment.