Cyclone® V Avalon® Memory Mapped (Avalon-MM) Interface for PCIe* Solutions User Guide

ID 683494
Date 3/19/2020
Public
Document Table of Contents

5.7.1.6. Avalon-MM Mailbox Registers

A processor local to the interconnect fabric typically requires write access to a set of Avalon-MM to PCI Express Mailbox registers and read-only access to a set of PCI Express to Avalon-MM Mailbox registers. Eight mailbox registers are available.

The Avalon-MM to PCI Express Mailbox registers are writable at the addresses shown in the following table. When the Avalon-MM processor writes to one of these registers the corresponding bit in the Avalon-MM to PCI Express Interrupt Status register is set to 1.

Table 55.  Avalon-MM to PCI Express Mailbox Registers, 0x3A00–0x3A1F

Address

Name

Access

Description

0x3A00

A2P_MAILBOX0

RW

Avalon-MM-to-PCI Express mailbox 0

0x3A04

A2P_MAILBOX1

RW

Avalon-MM-to-PCI Express mailbox 1

0x3A08

A2P _MAILBOX2

RW

Avalon-MM-to-PCI Express mailbox 2

0x3A0C

A2P _MAILBOX3

RW

Avalon-MM-to-PCI Express mailbox 3

0x3A10

A2P _MAILBOX4

RW

Avalon-MM-to-PCI Express mailbox 4

0x3A14

A2P _MAILBOX5

RW

Avalon-MM-to-PCI Express mailbox 5

0x3A18

A2P _MAILBOX6

RW

Avalon-MM-to-PCI Express mailbox 6

0x3A1C

A2P_MAILBOX7

RW

Avalon-MM-to-PCI Express mailbox 7

The PCI Express to Avalon-MM Mailbox registers are read-only at the addresses shown in the following table. The Avalon-MM processor reads these registers when the corresponding bit in the PCI Express to Avalon-MM Interrupt Status register is set to 1.

Table 56.  PCI Express to Avalon-MM Mailbox Registers, 0x3B00–0x3B1F

Address

Name

Access

Mode

Description

0x3B00

P2A_MAILBOX0

RO

PCI Express-to-Avalon-MM mailbox 0

0x3B04

P2A_MAILBOX1

RO

PCI Express-to-Avalon-MM mailbox 1

0x3B08

P2A_MAILBOX2

RO

PCI Express-to-Avalon-MM mailbox 2

0x3B0C

P2A_MAILBOX3

RO

PCI Express-to-Avalon-MM mailbox 3

0x3B10

P2A_MAILBOX4

RO

PCI Express-to-Avalon-MM mailbox 4

0x3B14

P2A_MAILBOX5

RO

PCI Express-to-Avalon-MM mailbox 5

0x3B18

P2A_MAILBOX6

RO

PCI Express-to-Avalon-MM mailbox 6

0x3B1C

P2A_MAILBOX7

RO

PCI Express-to-Avalon-MM mailbox 7

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