External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 1/31/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.2. Intel® Agilex™ EMIF IP AFI Signals

The following tables list Altera PHY interface (AFI) signals grouped according to their functions.

In each table, the Direction column denotes the direction of the signal relative to the PHY. For example, a signal defined as an output passes out of the PHY to the controller. The AFI specification does not include any bidirectional signals.

Note: Not all signals listed apply to every device family or every memory protocol.