External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 1/31/2022

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Document Table of Contents Calibrate Termination Tab

The Calibrate Termination tab allows you to update the RTT_NOM, RTT_PARK, RTT_WR, and Output Drive Strength termination settings without having to recompile or reprogram the design.

In addition, the Calibrate ODT feature lets you determine the optimal On-Die Termination and Output Drive Strength settings for your memory interface.

  • Press the Calibrate ODT button. The system runs calibration with the cross product of the termination settings you want to sweep, and displays the worst-case margin for each combination of settings.
  • If you select Run TG for each combination of settings, the traffic generator status is also displayed. (This option is disabled when the traffic generator is enabled in the Design Example.)

You can review the report and apply the optimal termination settings—that is, those with the largest margins—using the dropdown menu for each setting.

  • To reset the ODT settings from the IP parameterization, press Restore ODT settings from IP parameterization.

Figure 150. Termination Settings
Figure 151. Calibrate ODT

The ODT Activation section displays the ODT assertion patterns in use and the ODT settings in effect during read and write.

Figure 152. Assertion Table