External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 1/31/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.5.1.1. Dynamic On-Chip Termination (OCT)

Depending upon the Rs (series) and Rt (parallel) OCT values that you want, you should choose appropriate values for the RZQ resistor and connect this resistor to the RZQ pin of the FPGA.

Refer to the External Memory Interfaces Intel® Agilex™ FPGA IP parameter editor to determine the supported termination values.