External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 1/31/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents ac_parity_err for DDR4

Specifies whether to export the ac_parity_err interface at the IP top-level to indicate if a parity error was detected on the Address/Command bus by the memory, causing ALERT_N to toggle.
Table 18.  Interface: ac_parity_errInterface type: Conduit
Port Name Direction Description
ac_parity_err Output PORT_AC_PARITY_STATE_DESC