External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 1/31/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

11.7.4. Using the EMIF Debug Toolkit

The Main View of the EMIF Debug Toolkit contains the Memory Configuration, Calibration, Calibration Report, Calibrate Termination, Vref Margining, Driver Margining, ISSP, and Pin Delay Settings tabs.