2.3.1. Recommended Initial SDC Constraints 2.3.2. SDC File Precedence 2.3.3. Iterative Constraint Modification 2.3.4. Creating Clocks and Clock Constraints 2.3.5. Creating I/O Constraints 2.3.6. Creating Delay and Skew Constraints 2.3.7. Creating Timing Exceptions 2.3.8. Example Circuit and SDC File
184.108.40.206.1. Default Multicycle Analysis 220.127.116.11.2. End Multicycle Setup = 2 and End Multicycle Hold = 0 18.104.22.168.3. End Multicycle Setup = 2 and End Multicycle Hold = 1 22.214.171.124.4. Same Frequency Clocks with Destination Clock Offset 126.96.36.199.5. Destination Clock Frequency is a Multiple of the Source Clock Frequency 188.8.131.52.6. Destination Clock Frequency is a Multiple of the Source Clock Frequency with an Offset 184.108.40.206.7. Source Clock Frequency is a Multiple of the Destination Clock Frequency 220.127.116.11.8. Source Clock Frequency is a Multiple of the Destination Clock Frequency with an Offset
2.2.2. Step 2: Specify Timing Constraints
You must specify timing constraints that describe the clock frequency requirements, timing exceptions, and I/O timing requirements of your design for comparison against actual conditions during timing analysis. You define timing constraints in one or more Synopsys* Design Constraints (.sdc) files that you add to the project.
If you are unfamiliar with .sdc files, you can create an initial .sdc file in the Timing Analyzer GUI, or with provided .sdc file templates. If you are familiar with timing analysis, you can create an .sdc file in any text editor, and then add the file to the project.
- Use any combination of the following to enter the timing constraints for your design in an .sdc file:
Figure 34. Create Clock Dialog Defines Clock Constraints
- Enter constraints in the Timing Analyzer GUI—click Tools > Timing Analyzer, click Update Timing Netlist, and then enter constraints from the Constraints menu. The GUI displays the corresponding SDC command that applies.
- Create an .sdc file on your own. You can start by adding the Recommended Initial SDC Constraints, and then iteratively modify .sdc constraints and reanalyze the timing results. You must first create clock constraints before entering any constraints dependent on the clock.
- Save the .sdc file. When entering constraints in the Timing Analyzer GUI, click Constraints > Write SDC File to save the constraints you enter in the GUI to an .sdc file.
- Add the .sdc file to your project, as Step 3: Specify General Timing Analyzer Settings describes.
Did you find the information on this page useful?