MIPI D-PHY IP User Guide: Agilex™ 5 FPGAs

ID 817561
Date 4/01/2024
Public

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Document Table of Contents

6.2.1.54. TX_HS_EXIT

Offset: 0x41
Default: IP Param
Description: TX_HS_EXIT
Bit Name Access Description
7:0 TX_HS_EXIT Read Write *

TX_HS_EXIT.

Time that the transmitter drives LP-11 following a HS burst.
Note: * Can be configured as Read Only during IP generation to save resources.