MIPI D-PHY IP User Guide: Agilex™ 5 FPGAs

ID 817561
Date 4/01/2024
Public

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5.5.1. Generating the Synthesizable MIPI D-PHY Design Example

To generate the synthesizable design example, follow the steps below.

  1. On the Example Design tab, ensure that the Synthesis box is set as True.
  2. Configure the parameters as appropriate for your needs and click File > Save to save the current settings into the IP variation file (<user instance name>.ip).
  3. Click Generate Example Design in the upper-right corner of the window.
  4. Specify a directory for the MIPI D-PHY design example and click OK. Successful generation of the design example creates the synthesis file set under a qii directory.
  5. Click File > Exit to exit the IP Parameter Editor Pro window. The system prompts: Recent changes have not been generated. Generate now?. Click No to continue with the next flow.
  6. To open the design example, click File > Open Project, navigate to <project_directory>/<design_example_name>/qii/ed_synth.qpf, and click Open.