Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 11/01/2022
Public
Document Table of Contents

6.2.4.5. PCIe0 PRS

Table 78.  PCIe0 PRS
Parameter Value Default Value Description

PF0 Enable PRS

On / Off

Off

Enable PF0Page Request Service (PRS) capability.

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