Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 11/01/2022
Public
Document Table of Contents

4.12.2. D2H Data Mover Interface

Table 52.  D2H Data Mover Descriptor Interface (d2hdm_desc) Signals
Signal Name I/O Description
d2hdm_desc_ready_o Output

Indicates MCDMA IP Core is ready to accept D2H Data Mover descriptor data

d2hdm_desc_valid_i Input

Qualifies D2H Data Mover descriptor data signals

d2hdm_desc_data_i[255:0] Input

D2H Data Mover descriptor data

Table 53.  D2H Data Mover Descriptor Status Interface (d2hdm_desc_status) Signals
Signal Name I/O Description
d2hdm_desc_status_valid_o Output

Qualifies D2H Data Mover descriptor status

d2hdm_desc_status_data_o[31:0] Output

D2H Data Mover descriptor status data

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