Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 11/01/2022
Public
Document Table of Contents

3.9. Configuration Intercept Interface (EP Only)

For detailed information about this interface, refer to P-Tile Avalon Streaming Intel FPGA IP for PCI Express User Guide (Chapter 4 Section 4.11) or F-Tile Avalon Streaming Intel FPGA IP for PCI Express User Guide (Section 3.9 and Section 5.11)

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