Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 11/01/2022
Public

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Document Table of Contents

8.1.6.17. ifc_qdma_pio_read64

Table 107.  
API API Description Input Parameters Return Values
Uint64_t ifc_qdma_pio_read64(struct ifc_qdma_device *qdev, uint64_t addr);

Read the value from BAR2 address This API would be used for PIO testing, dumping statistics, pattern generation etc.

qdev: QDMA device

addr: adderss to read

0 on success

negative otherwise