ALTPLL (Phase-Locked Loop) IP Core User Guide

ID 683732
Date 6/16/2017
Document Table of Contents

Determining the PLL Lock Range

The PLL lock range is the range between the minimum (Freq min lock parameter) and maximum (Freq min lock parameter) input frequency values for which the PLL can achieve lock. The Quartus® Prime software shows these input frequency values in the PLL Summary report located under Resource Section of the Fitter folder in the Compilation Report. Changing the input frequency may cause the PLL to lose lock, but while the input clock remains within the minimum and maximum frequency specifications, the PLL is able to achieve lock.