ALTPLL (Phase-Locked Loop) IP Core User Guide

ID 683732
Date 6/16/2017
Document Table of Contents

Advanced Features

Altera devices offer on-chip PLL features previously found only in high-end discrete PLL devices. These advanced features, including gated lock, clock switchover, dynamic reconfiguration, programmable bandwidth, reconfigurable bandwidth, spread spectrum clocking, and post-scale counter cascading, increase system and device performance and provide advanced clock interfacing. The following sections define each advanced feature, and describe its application, and the parameter settings you must select in the ALTPLL parameter editor to enable the feature.