ALTPLL (Phase-Locked Loop) IP Core User Guide

ID 683732
Date 6/16/2017
Document Table of Contents

Clock Switchover

The clock switchover feature allows the PLL to switch between two input clocks. The clock switchover feature can be used for switching between clock inputs of different frequencies and is also useful for video applications that require a manual switch between operation frequencies. The clock switchover capability is widely implemented in telecommunication, storage, and server markets because these markets require highly reliable clocking schemes to ensure system reliability.

The following clock switchover modes are supported by the ALTPLL IP core:

  • Automatic switchover—The PLL monitors the currently used clock signal, and if it stops toggling or loss-of-lock occurs, the PLL automatically switches to the other clock signal (inclk0 or inclk1).
  • Manual clock switchover—The clock switchover is controlled using the clkswitch signal. The manual override feature available in automatic clock switchover is different from the manual clock switchover.