AN 669: Drive-On-Chip Design Example for Cyclone V Devices

ID 683466
Date 5/15/2022
Document Table of Contents

8.5. Building the HPS Preloader

Intel provides prebuilt preloader image in the software\spl_bsp\uboot-socfpga\spl directory. Only build the preloader if you change the HPS hardware settings.
  1. Delete the existing \software\spl-bsp directory to remove the old preloader.
  2. Start SoC EDS command shell.
  3. Start the Preloader Generator (BSP Editor) by typing the following command in SoC EDS command shell:
    bsp-editor &
  4. In the BSP Editor, select File > New HPS BSP ...
  5. In the New BSP window under Preloader settings directory, click ... to browse to the handoff folder.
  6. Select the <project_dir>/hps_isw_handoff/DOC_TANDEM_CVSX_QSYS_hps_0 directory and click Open.
    The New BSP window has all the settings populated, based on the handoff folder.
  7. Accept the default settings and click OK. The window closes.
    Figure 23. BSP Editor
  8. In the BSP Editor window, expand Advanced > boot and turn off WATCHDOG_ENABLE, as the watchdog timer must be off, then click Generate.
    Figure 24. BSP Editor Settings
    The message panel on the bottom indicates the status of the generation.
  9. Click Exit to close the BSP Editor.
  10. In the SoC EDS command shell, type the following command:
    cd <project_dir>/software/spl_bsp
  11. Type the command: make.
    If you see the following error message, refer to the Unable to make preloader in Windows 10 webpage on the RocketBoards website.
    Figure 25. Error Message